Press Releases
SMIC Adopts Cadence DFM and Low-power Silicon Realization Technology for 65-Nanometer Reference Flow
Shanghai [2010-12-04]
Leading Chinese Foundry Cites Significant Productivity Boost
Through Cadence Silicon Realization
SAN JOSE, Calif. and Shanghai, China, Dec. 04, 2010 – Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Semiconductor Manufacturing International Corporation ("SMIC", NYSE: SMI and HKSE: 981), the largest semiconductor foundry in China, has adopted Cadence? Silicon Realization products for the design-for-manufacturing (DFM) and low-power technology at the core of SMIC’s 65-nanometer Reference Flow 4.1. Using Cadence Encounter Digital Implementation System as the foundation, the companies collaborated to provide an integrated end-to-end Silicon Realization flow for 65-nanometer system-on-chip (SoC) designs.
After rigorous evaluation, SMIC selected the Cadence Silicon Realization products based on their robust hierarchical flow for large-scale designs and superior quality of results. SMIC determined that the tight flow integration across functional, physical, and electrical domains – for estimation, logic design, verification, physical implementation and in-design signoff technologies – provided a significant boost in both designer productivity and ease of use, and produced more deterministic results.
Cadence Silicon Realization technology used in the SMIC flow includes Incisive? Enterprise Simulator, Encounter? RTL Compiler, Encounter Test, Encounter Conformal? Low Power, Encounter Conformal Equivalence Checker, Encounter Digital Implementation System, QRC Extraction, Encounter Timing System, Encounter Power System, Litho Physical Analyzer, Litho Electrical Analyzer, Cadence CMP Predictor and Assura? Physical Verification.
“Our mutual customers can greatly benefit from the Cadence contributions to Reference Flow 4.1, which address two important challenges they face at 65 nanometers — design margins and yields,” said Min Zhu, senior director of design service at SMIC. “Deploying the full end-to-end Cadence Silicon Realization flow for digital design, verification, and implementation along with our reference flow will enable our customers to work more efficiently and productively toward improving silicon quality and shrinking time to market.”
Cadence recently announced a new holistic approach to Silicon Realization that moves chip development beyond its traditional patchwork of point tools to a streamlined end-to-end path of integrated technology, tools, and methodology. The new approach is focused on offering products and technologies that deliver on the three requirements for a deterministic path to silicon: unified design intent, abstraction, and convergence. A key element of the Cadence EDA360 strategy, this approach is aimed at boosting productivity, predictability and profitability while reducing risk.
“As longtime collaborators with SMIC, it’s a pleasure to once again team with their technologists to help our mutual customers carve a faster path to Silicon Realization,” said David Desharnais, product management group director at Cadence. “Working in collaboration with leading customers and design-chain partners like SMIC is key to fulfilling the EDA360 vision and the promise of enhanced productivity, predictability and profitability.”
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
dsolov@cadence.com
Cadence, Encounter, Incisive, Assura, Conformal and the Cadence logo are registered trademarks of Cadence Design Systems, Inc., in the USA and other countries. All other marks and names are the property of their respective owners
About SMIC
Semiconductor Manufacturing International Corporation (“SMIC”; NYSE: SMI; SEHK: 981) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in Mainland China, providing integrated circuit (IC) foundry and technology services at 0.35-micron to 45/40-nanometer. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and three 200mm wafer fabs in its Shanghai mega-fab, two 300mm wafer fabs in its Beijing mega-fab, a 200mm wafer fab in Tianjin, a 200mm fab under construction in Shenzhen, and an in-house assembly and testing facility in Chengdu. SMIC also has customer service and marketing offices in the U.S., Europe, and Japan, and a representative office in Hong Kong. In addition, SMIC manages and operates a 300mm wafer fab in Wuhan owned by Wuhan Xinxin Semiconductor Manufacturing Corporation.
For more information, please visit www.3dsentson.com
Safe Harbor Statements
(Under the Private Securities Litigation Reform Act of 1995)
This press release contains, in addition to historical information, “forward-looking statements” within the meaning of the “safe harbor” provisions of the U.S. Private Securities Litigation Reform Act of 1995. These forward-looking statements, including statements regarding the expected benefits of the cooperation, are based on SMIC’s current assumptions, expectations and projections about future events. SMIC uses words like “believe,” “anticipate,” “intend,” “estimate,” “expect,” “project” and similar expressions to identify forward-looking statements, although not all forward-looking statements contain these words. These forward-looking statements are necessarily estimates reflecting the best judgment of SMIC’s senior management and involve significant risks, both known and unknown, uncertainties and other factors that may cause SMIC’s actual performance, financial condition or results of operations to be materially different from those suggested by the forward-looking statements.
Investors should consider the information contained in SMIC’s filings with the U.S. Securities and Exchange Commission (SEC), including its annual report on 20-F filed with the SEC on June 29, 2010, especially in the “Risk Factors” and “Management’s Discussion and Analysis of Financial Condition and Results of Operations” sections, and such other documents that SMIC may file with the SEC or The Hong Kong Stock Exchange Limited (“SEHK”) from time to time, including on Form 6-K. Other unknown or unpredictable factors also could have material adverse effects on SMIC’s future results, performance or achievements. In light of these risks, uncertainties, assumptions and factors, the forward-looking events discussed in this press release may not occur. You are cautioned not to place undue reliance on these forward-looking statements, which speak only as of the date stated, or if no date is stated, as of the date of this press release. Except as required by law, SMIC undertakes no obligation and does not intend to update any forward-looking statement, whether as a result of new information, future events or otherwise.
For more information, please contact:
Mr. Peter Lin
Public Relations
Tel: +86-21-3861-0000 x12349
Email: Peter_LHH@3dsentson.com
Ms Angela Miao
Public Relations
Tel: +86-21-3861-0000 x10088
Email: Angela_Miao@3dsentson.com
Leading Chinese Foundry Cites Significant Productivity Boost
Through Cadence Silicon Realization
SAN JOSE, Calif. and Shanghai, China, Dec. 04, 2010 – Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today announced that Semiconductor Manufacturing International Corporation ("SMIC", NYSE: SMI and HKSE: 981), the largest semiconductor foundry in China, has adopted Cadence? Silicon Realization products for the design-for-manufacturing (DFM) and low-power technology at the core of SMIC’s 65-nanometer Reference Flow 4.1. Using Cadence Encounter Digital Implementation System as the foundation, the companies collaborated to provide an integrated end-to-end Silicon Realization flow for 65-nanometer system-on-chip (SoC) designs.
After rigorous evaluation, SMIC selected the Cadence Silicon Realization products based on their robust hierarchical flow for large-scale designs and superior quality of results. SMIC determined that the tight flow integration across functional, physical, and electrical domains – for estimation, logic design, verification, physical implementation and in-design signoff technologies – provided a significant boost in both designer productivity and ease of use, and produced more deterministic results.
Cadence Silicon Realization technology used in the SMIC flow includes Incisive? Enterprise Simulator, Encounter? RTL Compiler, Encounter Test, Encounter Conformal? Low Power, Encounter Conformal Equivalence Checker, Encounter Digital Implementation System, QRC Extraction, Encounter Timing System, Encounter Power System, Litho Physical Analyzer, Litho Electrical Analyzer, Cadence CMP Predictor and Assura? Physical Verification.
“Our mutual customers can greatly benefit from the Cadence contributions to Reference Flow 4.1, which address two important challenges they face at 65 nanometers — design margins and yields,” said Min Zhu, senior director of design service at SMIC. “Deploying the full end-to-end Cadence Silicon Realization flow for digital design, verification, and implementation along with our reference flow will enable our customers to work more efficiently and productively toward improving silicon quality and shrinking time to market.”
Cadence recently announced a new holistic approach to Silicon Realization that moves chip development beyond its traditional patchwork of point tools to a streamlined end-to-end path of integrated technology, tools, and methodology. The new approach is focused on offering products and technologies that deliver on the three requirements for a deterministic path to silicon: unified design intent, abstraction, and convergence. A key element of the Cadence EDA360 strategy, this approach is aimed at boosting productivity, predictability and profitability while reducing risk.
“As longtime collaborators with SMIC, it’s a pleasure to once again team with their technologists to help our mutual customers carve a faster path to Silicon Realization,” said David Desharnais, product management group director at Cadence. “Working in collaboration with leading customers and design-chain partners like SMIC is key to fulfilling the EDA360 vision and the promise of enhanced productivity, predictability and profitability.”
About Cadence
Cadence enables global electronic design innovation and plays an essential role in the creation of today's integrated circuits and electronics. Customers use Cadence software and hardware, methodologies, and services to design and verify advanced semiconductors, consumer electronics, networking and telecommunications equipment, and computer systems. The company is headquartered in San Jose, Calif., with sales offices, design centers, and research facilities around the world to serve the global electronics industry. More information about the company, its products, and services is available at www.cadence.com.
Dean Solov
Cadence Design Systems, Inc.
408-944-7226
dsolov@cadence.com
Cadence, Encounter, Incisive, Assura, Conformal and the Cadence logo are registered trademarks of Cadence Design Systems, Inc., in the USA and other countries. All other marks and names are the property of their respective owners
About SMIC
Semiconductor Manufacturing International Corporation (“SMIC”; NYSE: SMI; SEHK: 981) is one of the leading semiconductor foundries in the world and the largest and most advanced foundry in Mainland China, providing integrated circuit (IC) foundry and technology services at 0.35-micron to 45/40-nanometer. Headquartered in Shanghai, China, SMIC has a 300mm wafer fabrication facility (fab) and three 200mm wafer fabs in its Shanghai mega-fab, two 300mm wafer fabs in its Beijing mega-fab, a 200mm wafer fab in Tianjin, a 200mm fab under construction in Shenzhen, and an in-house assembly and testing facility in Chengdu. SMIC also has customer service and marketing offices in the U.S., Europe, and Japan, and a representative office in Hong Kong. In addition, SMIC manages and operates a 300mm wafer fab in Wuhan owned by Wuhan Xinxin Semiconductor Manufacturing Corporation.
For more information, please visit www.3dsentson.com
Safe Harbor Statements
(Under the Private Securities Litigation Reform Act of 1995)
This press release contains, in addition to historical information, “forward-looking statements” within the meaning of the “safe harbor” provisions of the U.S. Private Securities Litigation Reform Act of 1995. These forward-looking statements, including statements regarding the expected benefits of the cooperation, are based on SMIC’s current assumptions, expectations and projections about future events. SMIC uses words like “believe,” “anticipate,” “intend,” “estimate,” “expect,” “project” and similar expressions to identify forward-looking statements, although not all forward-looking statements contain these words. These forward-looking statements are necessarily estimates reflecting the best judgment of SMIC’s senior management and involve significant risks, both known and unknown, uncertainties and other factors that may cause SMIC’s actual performance, financial condition or results of operations to be materially different from those suggested by the forward-looking statements.
Investors should consider the information contained in SMIC’s filings with the U.S. Securities and Exchange Commission (SEC), including its annual report on 20-F filed with the SEC on June 29, 2010, especially in the “Risk Factors” and “Management’s Discussion and Analysis of Financial Condition and Results of Operations” sections, and such other documents that SMIC may file with the SEC or The Hong Kong Stock Exchange Limited (“SEHK”) from time to time, including on Form 6-K. Other unknown or unpredictable factors also could have material adverse effects on SMIC’s future results, performance or achievements. In light of these risks, uncertainties, assumptions and factors, the forward-looking events discussed in this press release may not occur. You are cautioned not to place undue reliance on these forward-looking statements, which speak only as of the date stated, or if no date is stated, as of the date of this press release. Except as required by law, SMIC undertakes no obligation and does not intend to update any forward-looking statement, whether as a result of new information, future events or otherwise.
For more information, please contact:
Mr. Peter Lin
Public Relations
Tel: +86-21-3861-0000 x12349
Email: Peter_LHH@3dsentson.com
Ms Angela Miao
Public Relations
Tel: +86-21-3861-0000 x10088
Email: Angela_Miao@3dsentson.com
